Semiconductor devices may typically be classified as either volatile semiconductor devices, which require power to maintain storage of data, or non-volatile semiconductor devices, which can retain data even upon removal of a power source. An example non-volatile semiconductor device is a flash memory device, which generally includes an array of memory cells arranged in rows and columns. Each memory cell includes a transistor structure having a gate, a drain, a source, and a channel defined between the drain and the source. Each memory cell is located at an intersection between a word line and a bit line, where the gate is connected to the word line, the drain is connected to the bit line, and the source is connected to a source line, which in turn is connected to common ground. The gate of a conventional flash memory cell generally comprises a dual-gate structure, including a control gate and a floating gate, wherein the floating gate is sandwiched between two dielectric layers to trap carriers, such as electrons, to program the cell.
Flash memory devices may in turn be classified as NOR or NAND flash memory devices. While NOR flash memory has its benefits, NAND flash memory typically offers faster program and erase speeds, in large part due to its serialized structure, whereby program and erase operations may be performed on strings of memory cells.
Despite the advantages of existing NAND flash memory, the semiconductor industry is increasingly driven towards smaller and even more capable electronic devices. In order to reduce the size of such devices while maintaining or improving their respective capabilities, the size of components within the devices, and the distances between those components, must be reduced.
With regard to NAND flash memory devices, issues arise that prevent reduction in size while maintaining the cell's capabilities and respective functions. For instance, the traditional string height of selected transistors and contacts has increasingly become an obstacle to reducing the scale of cell dimensions. These dimensions have proven difficult to scale because of leakage concerns caused by shrinking the distance between word lines and source lines. In this regard, gate-induced drain leakage (GIDL) current from a ground select line (GSL) can induce hot electron (hot-E) disturbance to cells adjacent to high threshold voltages. As a result, edge word lines often experience this disturbance.
Accordingly, there remains a need in the art to reduce the size of a NAND flash memory device while mitigating the potential for hot electron edge word line disturbance.